The present invention relates to semiconductor devices having internal circuitry for producing either a voltage higher in potential than the power supply voltage or a lower voltage than an input voltage, which voltage is used to operate internal circuit elements. This invention also relates to electronic equipment such as memory cards using semiconductor devices of the type stated above.
As handheld or “mobile” information tools come into wide use, chances for hand-carrying data in the form of plug-in type semiconductor storage media increase, resulting in a likewise increase in amount of the carry-on data of high-quality images, audio and motion pictures as well as text documents. To this end, demands grow for non-volatile memories that are inevitable for conservation of these kinds of data—in particular, electrically erasable programmable read only memory (EEPROM) chips. An EEPROM with “all-at-once” erasability is called flash EEPROM (referred to as “flash memory” hereinafter), which is widely used as a large-capacity/low-cost nonvolatile memory as it performs an erase operation at a time on a per-block basis to thereby offer the capability to achieve higher integration densities.
While IC cards with a built-in flash memory are becoming popularized as cell phone-use cards, credit cards, cash cards and others, the quest for attaining multi-functionalities increases, which leads to a need for embedding a large-capacity memory capable of storing an operating system (OS) and application programs plus data while at the same time offering reliable functionality with lower power consumption. Due to this, there are advances in technologies for micro-fabrication of microcomputers and flash memories to be mounted in IC cards and also for lowering the supply voltage.
In addition, as consumer equipment grows in performance and functionality, flash memory-embedded microcomputers also are required to offer enhanced speed performances with lower power consumption, resulting in advances in downsizing and reduction of the power supply voltage of flash memory-embedded microcomputers or system-on-chip (SoC) devices.
In flash memories, a higher voltage than the supply voltage is necessary during data writing and erasing operations; for this reason, a voltage raising or “boosting” circuit is provided within a flash memory LSI. A circuit scheme, called the charge pump circuit, is widely used as such the booster circuit. An example of the charge pump circuit is shown in FIG. 29, wherein multiple stages of basic unit circuits each having a capacitor 160 and a diode 170 are serially connected together. A pulsate bias voltage is applied to one end of such capacitor, causing electrical charge to move toward the next step on a per-clock basis for potential riseup of the voltage of a capacitive load. Another example of the charge pump circuit is the so-called “voltage-doubling rectification” scheme, which charges up capacitors in parallel and then switches to a series connection to thereby obtain a high voltage required.
Further alternative voltage booster circuit schemes are available, which include a scheme for using a DC-DC converter circuit and a technique for using in combination a DC-DC converter circuit and a charge pump circuit, as disclosed in Japanese Application Patent Laid-open Publication Nos. Hei 07-21791 and Hei 08-297986, respectively.
Additionally, in voltage-drop circuit-embedded LSIs to be used when requiring a lower voltage than an input voltage, a dropper type circuit is employed; alternatively, when using a chopper type voltage drop circuit, inductors for use therein are discrete components, which are provided external to an LSI chip.
While the quest grows for miniaturization and lower power supply voltage of microcomputers or flash memories to be built in IC cards or flash memory-embedded microcomputers, voltages for use during write and erase operations of flash memories are hardly lowered due to the operation principles thereof even though microfabrication technologies are much advanced. For this reason, a difference between input and output voltages of the voltage booster circuitry tends to further increase in future.
With the charge pump scheme used for prior known voltage booster circuits, a potentially raised voltage per pump stage becomes a voltage with its potential equal to a difference between the power supply voltage and a diode drop-down voltage. Thus, as the supply voltage of an LSI decreases with advances in device miniaturization, the boosted voltage per pump stage becomes smaller. This results in the number of stages required for boosting up to a desired voltage increasing with a decrease in supply voltage, which leads to a likewise increase in layout area of circuits. As the memory capacity increases to provide large storage capacities of 1, 4 and 16 gigabits (Gb), such area increase becomes more noticeable. While the processors and memories will be lowered in voltage due to advances in microfabrication techniques, the flash memory's write and erase voltages are hardly changed. Thus, downsizing the power supply circuitry must be an important issue for LSIs of the type having built-in voltage booster circuits.
On the other hand, in known DC-DC converter schemes or DC-DC converter/charge-pump combining schemes, inductance element fabrication requires a “special” process not found in standard LSI processes—that is, a thick-film process aimed at magnetic core formation and achievement of lower resistance. Unfortunately the thick-film wiring is faced with a problem which follows: at circuit portions other than the inductance elements such as for example word lines of a memory, the wiring aspect becomes higher, resulting in the difficulty in microfabrication. This in turn makes it difficult to fabricate on-chip inductance elements. An approach to avoiding this risk is to the use of a method having the steps of forming inductance elements at separate processes and then bonding them together or alternatively an external connection method. For the reasons stated above, the known DC-DC converter schemes fail to be the voltage booster circuit scheme suitable for standard LSI processes.
Also note that voltage drop circuit-embedded LSIs also suffer from problems which follow: large power dissipation due to the dropper circuit designs, or a large parts-mount area due to the use of chopper circuits externally associated with external inductors.
It is therefore an object of the present invention to provide a semiconductor device capable of achieving size reduction of its associated power supply unit while using currently established semiconductor fabrication technologies and also capable of reducing switching noises. Another object of the invention is to provide a memory card using the semiconductor device.